1. Field of the Invention
The present invention relates to a circuit designing system for performing circuit designing, such as for LSI and so forth, on a computer system. More specifically, the invention relates to a circuit designing system which has a design rule checking function for checking whether a result of circuit designing of a semiconductor integrated circuit conforms a design rule or not.
2. Description of the Related Art
Conventionally, in a circuit designing system of the type set forth above, in order to check whether the contents of a circuit diagram data or circuit connection information prepared at a predetermined step (circuit designing step) (hereinafter, these information, i.e. circuit diagram data or circuit connection information, will be referred to as "circuit design information: NETLIST") is prepared according to a preliminarily established design rule or not, a design rule checking device is normally provided.
A design rule checking is performed at a step immediately after preparation of the circuit design information by a circuit diagram editor or logic synthesizing tool and so forth. By performing design rule checking at early stage of designing, a quality of circuit design can be remarkably improved. Also, error or defect of the circuit which tends to be found in the later stage of designing operation (e.g. logic simulation or layout designing and so forth) can be found at earlier timing so as to contribute for shortening of LSI development period.
A process of LSI designing by the conventional design system will be discussed briefly.
At first, the circuit design information including circuit construction information and circuit connection information is prepared by a circuit diagram editor and a logic synthesizing tool and so forth. The content of the prepared circuit design information is checked against a predetermined design rule. If the result of checking shows that no error is found, then, a logic simulation is performed according to the circuit design information. Subsequently, check is performed whether a simulation error is present or not. When layout error, design rule error or simulation and error is caused, the process is returned to a step for information generating the circuit design information. Accordingly, occurrence of error at later stage (for example, layout design than circuit design information preparation) should cause wasting of done steps to cause longer design period.
Amongst, the design ruler checking is particularly important for development of ASIC (Application Specific IC), for which general user is directly in touch with designing and effective for shortening TAT (Trun Around Time).
The circuit designing system typically includes a design rule file storing a preliminarily established design rule, and a design rule checking device having a check control portion for checking whether the circuit design information is prepared in conformance with the design rule.
The check control portion reads the circuit design information and becomes ready state for receiving a check command from an input device. When various check command is input from the input device, the check control portion performs checking operation corresponding to the input command.
Typically, the following items necessary for LSI development are checked through the design rule checking.
(1) Name check: The prepared circuit connection information is utilized by various design environment tools. For these tools, kind of characters, number of characters to be used as name of an external terminal, name of element and so forth, names (keyword) which cannot be used, and so forth are defined. Name check is performed for various names in the circuit connection information of an objective circuit whether those names comply with the defined rule for the name or not.
(2) Prohibited Connection check: Check is performed where connection which a layout tool cannot handle, meaningless connection in the light of the circuit, specified connection for making the circuit meaningful, prohibited connection between elements which should not be connected, are not made.
(3) Forced Connection check: Check is performed whether terminals to be inherently connected for performing test of LSI after fabrication, specified connection for making the connection meaningful in the circuit, combination of terminals to be inherently connected between the elements, are connected in conformance.
(4) Open Short check: Check is performed for properness of terminal held in open state, terminal shorted between power source line and grounding line.
(5) Fan Out check: Since each output terminal is restricted a load capacity to be driven, check is performed whether the output terminals in the circuit connection information is used within a capacity of driving.
Upon performing checking set forth above, check is performed with reference to relevant design rule in the design rule file. The design rule file describes the design rule for respective checking items in detail. Receiving condition of the command and check execution state are output to the output device so that the final result of checking is output to an output file. After outputting the results of checking, the circuit design checking portion becomes ready state for receiving the check command to perform checking sequentially until an end command is input. After completion of necessary checking, a circuit designer performs correction of the circuit connection information as required on the basis of the content of the result outputting file.
On the other hand, associating with progress of the semiconductor device fabrication technology, the package density of the LSI is increasing is has been past a long period where a gate length of a MOS transistor becomes less than or equal to 1 mm to be so-called submicron age. Also, down-sizing of the circuit elements of the LSI is progressed so that the influence of the wiring length between the elements of the LSI becomes more significant.
For example, an input capacity of an input terminal (named H01) and a load driving performance of an output terminal (named N01) of a basic inverter (named F101) of a cell base series CB-C7 (gate length is 0.8 .mu.), made by NEC Corporation, are
H01 Terminal Capacity: 0.110 pf PA1 N01 Capacity can be Driven: 3.319 pf. PA1 circuit design information generating means for generating a circuit design information including a construction information and circuit connection information of an objective circuit to be designed; PA1 wiring capacity calculating means for deriving wiring capacities of all wirings connected to output terminals of respective circuit elements in the circuit design information; PA1 design rule checking means for checking whether the content of the circuit setting information is consistent of a preliminarily defined design rule; PA1 logic simulation means for performing predetermined logic simulation on the basis of the wiring design information and the wiring capacity from the wiring capacity calculating means; PA1 layout designing means for performing layout designing for the objective circuit to be designed on the basis of the circuit design information; PA1 the circuit design information generating means including logic synthesizing means for performing predetermined logic synthesizing on the basis of the wiring capacity from the wiring capacity calculating means and generating predetermined information of the circuit designing information; PA1 the design rule checking means including PA1 The circuit designing system may further comprises: PA1 wiring capacity storage means for strong wiring capacities per output terminals of respective circuit elements derived, derived by the wiring capacity calculating means. PA1 generating a circuit design information including a construction information and circuit connection information of an objective circuit to be designed; PA1 deriving wiring capacities of all wirings connected to output terminals of respective circuit elements in the circuit design information; PA1 for checking whether the content of the circuit setting information is consistent of a preliminarily defined design rule; PA1 performing predetermined logic simulation on the basis of the wiring design information and the wiring capacity from the wiring capacity calculating means; PA1 performing layout designing for the objective circuit to be designed on the basis of the circuit design information; PA1 the design rule checking step including PA1 Other objects, features and advantages of the present invention will become apparent from the detailed description given hereinafter.
On the other hand, a capacity of wiring per 1 mm is 0.17 pf. Therefore, the load capacity per 1 mm of the wiring is approximately 1.5 times greater than the terminal capacity of the element per se and thus quite large. In fact, wiring length in LSI exceeds 10 nm at the longest. In such case, the capacity of the wiring capacity becomes equivalent to connection of fifteen inverters (F101) and thus gives significant influence for the LSI. Therefore, it is quite important to accurately perform fan out checking in the design stage.
Also, in order to accurately perform fan out checking, it is inherent to precisely know the length of wiring connected to each circuit element. However, in practice, the actual wiring length cannot be known precisely until layout design for the LSI is completed. Accordingly, in the prior art, it is typical to progress designing with deriving the wiring length through prediction.
For performing the foregoing fan out checking by the design rule checking device, it becomes necessary to estimate the wiring lengths between respective elements. That is, the fan out checking is a check for the load capacity driven by each output terminal, which load capacity is a sum of "terminal capacity of the input terminal of the connected circuit element" and "capacity of the wiring to the input terminal of the connected circuit element ".
Upon fan out checking by the design rule checking device, as a method for calculating the wiring capacity, the following two methods are typically employed in the prior art.
(A). Simple Method:
This method is a method, in which a predetermined wiring length is preliminarily determined and the capacity corresponding to the predetermined wiring length is added to the input terminal capacity to store in the design rule file. Upon checking, since the wiring capacity is already included in the input terminal capacity of each circuit element, the load capacity of the output terminal can be calculated by only "input terminal capacity of the connected circuit element ".
In fan out checking employing this method, one of the output terminals as object for checking is extracted and then the input terminal capacity of the circuit element connected to the objective output terminal is read out from the design rule file. Next, the load driving performance value of the objective output terminal is read out from the design rule file, Thereafter, the value of the input terminal capacity and the value of the load driving performance of the objective output terminal are compared to perform fan out checking. The foregoing process is performed for all of the output terminals in the circuit design information.
(B) Predicting method:
This is a method for predicting the wiring length within the system. By performing prediction of the wiring length per each output terminal, per macro unit, or uniformly for all output terminals, the predicted value is added as a load for the corresponding output terminal. Different from the simple method, the input terminal capacity of the circuit element is stored in dependently of the capacity of the wiring in the design rule file. Upon fan out checking, the load capacity of the output terminal is calculated as a sum of "input terminal capacity of the connected circuit element " and "wiring capacity corresponding to the predicted wiring length to the input terminal of the connected circuit element ".
In fan out checking employing this method, one of the output terminals is extracted as the object for checking. Next, the input terminal capacity of the circuit element to be connected to the objective output terminal is read out from the design rule file. Then, by a predetermined process, the wiring length of the objective output terminal is predicted to calculate the wiring capacity based on the predicted wiring length. Subsequently, by calculating sum of the input terminal capacity value and the predicted wiring capacity to derive the load capacity of the output terminal. The load capacity of the output terminal is then compared with the load driving performance of the objective output terminal. The foregoing process is performed for all of the output terminals in the circuit connection information.
Prediction of the wiring length and calculation of the wiring capacity are required only at the step of design rule checking but also at a step for preparing the circuit design information by the logic synthesizing tool for synthesizing circuit with taking a delay period in consideration of the influence of the wiring capacity and a step for logic simulation for simulating the circuit with taking a delay period in consideration of the influence of the wiring capacity.
In the above-mentioned conventional circuit design system, upon performing the fan out checking by the design rule checking device, if incorporation of the factor of the wiring capacity is done by employing the foregoing simple method, since the wiring capacity at the predetermined wiring length is incorporated, precise fan out checking cannot be performed. On the other hand, when incorporation of the factor of the wiring capacity is done by employing the foregoing prediction method, while precision of fan out checking is increased, is unreasonable to perform prediction of the wiring length and calculation of the wiring capacity for the same circuit respectively at the design rule checking step, the circuit connection information preparation step by the logic synthesizing tool, and the logic simulation step.
Also, in view of consistency of wiring length prediction in the design flow, it is necessary that the predicted values at respective steps are completely consistent with each other. Therefore, when wiring length prediction method is modified in one tool (step), it inherently requires modification in other tools performing prediction of the wiring length. This makes design flow construction complicate.
Furthermore, the actual wiring length cannot be finally checked with the wiring length after completion of the layout designing.